| High definition electrical impedance tomography A Wexler, Z Mu, RM Murugan, GS Strobel US Patent 6,745,070, 2004 | 110 | 2004 |
| High definition electrical impedance tomography methods for the detection and diagnosis of early stages of breast cancer A Wexler, R Murugan US Patent App. 09/991,993, 2002 | 76 | 2002 |
| Millimeter wave integrated circuit with ball grid array package including transmit and receive channels RM Murugan, M Mi, GP Morrison, J Chen, KR Rhyner, SC Beddingfield, ... US Patent 9,666,553, 2017 | 59 | 2017 |
| Integrated circuit package with emi shield R Murugan, KR Rhyner, PR Harper, S Mukherjee US Patent App. 12/169,908, 2010 | 28 | 2010 |
| Package co-design of a fully integrated multimode 76-81ghz 45nm rfcmos fmcw automotive radar transceiver M Mi, M Moallem, J Chen, M Li, R Murugan 2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 1054-1061, 2018 | 13 | 2018 |
| System-level electro-thermal analysis of RDS(ON) for power MOSFET R Murugan, N Ai, CT Kao 2017 33rd Thermal Measurement, Modeling & Management Symposium (SEMI-THERM …, 2017 | 13 | 2017 |
| Semiconductor device having wafer level chip scale packaging substrate decoupling RM Murugan, RF McCarthy, BS Haroun, PR Harper US Patent 7,919,860, 2011 | 13 | 2011 |
| Method, system and apparatus for controlled impedance at transitional plated-through hole via sites using barrel inductance minimization J Masuyama, R Murugan US Patent App. 10/828,449, 2005 | 12 | 2005 |
| High current packages with reduced solder layer count Y Tang, L Wan, WT Harrison, MJ Prakuzhy, RM Murugan US Patent 11,545,420, 2023 | 10 | 2023 |
| Multiscale EMC Modeling, Simulation, and Validation of a Synchronous Step-Down DC-DC Converter R Murugan, J Chen, A Tripathi, BP Nayak, H Muniganti, D Gope IEEE Journal on Multiscale and Multiphysics Computational Techniques, 1-12, 2023 | 9 | 2023 |
| System co-design of a 600V GaN FET power stage with integrated driver in a QFN system-in-package (QFN-SiP) J Chen, Y Xie, D Trombley, R Murugan 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 1221-1226, 2019 | 9 | 2019 |
| Minimizing dynamic crosstalk-induced jitter timing skew R Murugan, GK Singh US Patent 7,680,226, 2010 | 9 | 2010 |
| Method, System And Apparatus For Controlled Impedance At Transitional Plated-Through Hole Via Sites Using Barrel Inductance Minimization J Masuyama, R Murugan US Patent App. 11/752,032, 2007 | 9 | 2007 |
| System ElectroThermal Co-Design of a Zero-Drift Current-Shunt Monitor with Precision Integrated Shunt Resistor J Chen, R Murugan, S Kummerl, U Chaudhry, E Lim, T Shimizu, T Klumpp, ... International Symposium on Microelectronics 2018 (1), 000193-000197, 2018 | 8 | 2018 |
| Silicon-package co-design of a 45nm 200MHz bandwidth CMOS RF-to-Serdes transceiver system on chip (SoC) M Li, T Tang, J Chen, P Litmanen, S Akhtar, R Murugan 2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging …, 2016 | 7 | 2016 |
| High definition impedance imaging A Wexler, PA O'connor, RM Murugan, Z Zheng US Patent 8,369,941, 2013 | 7 | 2013 |
| Method, system and apparatus for quantifying the contribution of inter-symbol interference jitter on timing skew budget R Murugan, M Greim US Patent 7,251,302, 2007 | 7 | 2007 |
| Antenna-on-package including multiple types of antenna Y Tang, RM Murugan US Patent 11,600,932, 2023 | 6 | 2023 |
| Hall-effect sensor package with added current path M Li, Y Tang, J Chen, E Tuncer, UM Chaudhry, TR Larson, RM Murugan, ... US Patent 10,892,405, 2021 | 6 | 2021 |
| Structures and methods for capacitive isolation devices E Tuncer, M Mi, S Sankaran, RM Murugan, V Gupta US Patent App. 15/646,976, 2019 | 6 | 2019 |
Django TrombleyRF Technologist - Distinguished Member of Scientific StaffAdresă de e-mail confirmată pe ti.com
