Raphael David
Raphael David
Adresă de e-mail confirmată pe cea.fr
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DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints.
R David, D Chillet, S Pillement, O Sentieys
ipdps, 2002
Dynamic power management of voltage-frequency island partitioned networks-on-chip using intel sing-chip cloud computer
R David, P Bogdan, R Marculescu, U Ogras
Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on …, 2011
Sesam: An mpsoc simulation environment for dynamic application processing
N Ventroux, A Guerre, T Sassolas, L Moutaoukil, G Blanc, C Bechara, ...
2010 10th IEEE International Conference on Computer and Information …, 2010
Statically allocating set of tasks to particular cluster and dynamically allocating each task to different processing units within cluster
F Blanc, T Collette, R David, V David, M Harrand, S Louise, N Ventroux
US Patent 9,164,807, 2015
DART: a functional-level reconfigurable architecture for high energy efficiency
S Pillement, O Sentieys, R David
EURASIP Journal on Embedded Systems 2008, 1-13, 2007
Dynamic power management for multicores: Case study using the intel SCC
R David, P Bogdan, R Marculescu
2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012
A small footprint interleaved multithreaded processor for embedded systems
C Bechara, A Berhault, N Ventroux, S Chevobbe, Y Lhuillier, R David, ...
2011 18th IEEE International Conference on Electronics, Circuits, and …, 2011
Architecture reconfigurable dynamiquement pour applications mobiles
R David
Rennes 1, 2003
Dart: A dynamically reconfigurable architecture dealing with next generation telecommunications constraints
R David, D Chillet, S Pillement, O Sentieys
9th IEEE Reconfigurable Architecture Workshop RAW, 2002
Hierarchical network-on-chip for embedded many-core architectures
A Guerre, N Ventroux, R David, A Merigot
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 189-196, 2010
An efficient and flexible hardware support for accelerating synchronization operations on the sthorm many-core architecture
F Thabet, Y Lhuillier, C Andriamisaina, JM Philippe, R David
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 531-534, 2013
A compilation framework for a dynamically reconfigurable architecture
R David, D Chillet, S Pillement, O Sentieys
Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002
HARS: A hardware-assisted runtime software for embedded many-core architectures
Y Lhuillier, M Ojail, A Guerre, JM Philippe, KB Chehida, F Thabet, ...
ACM Transactions on Embedded Computing Systems (TECS) 13 (3s), 1-25, 2014
Method and system for conducting intensive multitask and multiflow calculation in real-time
R David, D Vincent, N Ventroux, T Collette
US Patent 9,052,957, 2015
Scmp architecture: an asymmetric multiprocessor system-on-chip for dynamic applications
N Ventroux, R David
Proceedings of the Second International Forum on Next-Generation Multicore …, 2010
Approximate-timed transactional level modeling for mpsoc exploration: A network-on-chip case study
A Guerre, N Ventroux, R David, A Merigot
2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009
Du microprocesseur au circuit FPGA: Une analyse sous l'angle de la reconfiguration
R David, D Lavenier, S PAILLEMENT
TSI. Technique et science informatiques 24 (4), 395-422, 2005
Artm: A lightweight fork-join framework for many-core embedded systems
M Ojail, R David, Y Lhuillier, A Guerre
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
Allocation and control unit for controlling parallel execution of threads on auxiliary processing units
S Louise, V David, R David
US Patent 8,973,009, 2015
Reconfigurable operator based multimedia embedded processor
D Menard, E Casseau, S Khan, O Sentieys, S Chevobbe, S Guyetant, ...
International Workshop on Applied Reconfigurable Computing, 39-49, 2009
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