| MIPSfpga: using a commercial MIPS soft‐core in computer architecture education SL Harris, DM Harris, D Chaver, R Owen, ZL Kakakhel, E Sedano, ... IET Circuits, Devices & Systems 11 (4), 283-291, 2017 | 26 | 2017 |
| Acceleration of Monte-Carlo simulation-based quantization of DSP systems E Sedano, JA López, C Carreras Systems, Signals and Image Processing (IWSSIP), 2012 19th International …, 2012 | 10 | 2012 |
| Quantization Analysis of the Infrared Interferometer of the TJ-II Stellarator for its Optimized FPGA-Based Implementation L Esteban, JA López, E Sedano, S Hernandez-Montero, M Sanchez IEEE, 2013 | 9 | 2013 |
| MIPSfpga: hands-on learning on a commercial soft-core SL Harris, R Owen, E Sedano, DC Martinez 2016 11th European Workshop on Microelectronics Education (EWME), 1-5, 2016 | 5 | 2016 |
| Practical experiences based on MIPSfpga D Chaver, Y Panchul, E Sedano, DM Harris, R Owen, ZL Kakakhel, ... Proceedings of the 19th Workshop on Computer Architecture Education, 1-9, 2017 | 4 | 2017 |
| A fast interpolative wordlength optimization method for DSP systems E Sedano, JA López, C Carreras | 4 | 2012 |
| Automated wordlength optimization framework for multi-source statistical interval-based analysis of nonlinear systems with control-flow structures E Sedano E.T.S.I. Telecomunicación (UPM), 2016 | 3 | 2016 |
| Automated data flow graph partitioning for a hierarchical approach to wordlength optimization E Sedano, D Menard, JA López International Symposium on Applied Reconfigurable Computing, 133-143, 2014 | 3 | 2014 |
| Quantization analysis of the infrared interferometer of the TJ-II for its optimized FPGA-based implementation L Esteban, JA Lopez, E Sedano, S Hernandez-Montero, M Sanchez Real Time Conference (RT), 2012 18th IEEE-NPSS, 1-5, 2012 | 3 | 2012 |
| Implementation of a hardware branch-predictor evaluation platform based on FPGAs E Sedano, D Chaver, J Resano 2009 Ph. D. Research in Microelectronics and Electronics, 44-47, 2009 | 3 | 2009 |
| Systems and methods for improving the execution of computational algorithms PB LÓPEZ-CORTIJO, CC VAQUER, RS CABRERA, JAL MARTÍN, ... US Patent 9,311,433, 2016 | 1 | 2016 |
| Interval-based analysis and word-length optimization of non-linear systems with control-flow structures JA Lopez, E Sedano, C Carreras, C López The 7th International Conference on Computational Methods (ICCM) 3, 1333-1342, 2016 | 1 | 2016 |
| Improving peLIFO Cache Replacement Policy: Hardware Reduction and Thread-Aware Extension E SEDANO, S SEPULVEDA, F CASTRO, D CHAVER, ... Journal of Circuits, Systems, and Computers, 2013 | 1 | 2013 |
| Applications of Interval-Based Simulations to the Analysis and Design of Digital LTI Systems JA López, E Sedano, L Esteban, G Caffarena, A Fernández-Herrero, ... Applications of Digital Signal Processing, 2011 | 1 | 2011 |
| Uso de la infraestructura docente MIPSfpga v2. 0 en la asignatura Arquitectura de Sistemas Integrados D Chaver, Y Panchul, E Sedano, DM Harris, R Owen, ZL Kakakhel, ... Universidad de Granada. Departamento de Arquitectura y Tecnología de …, 2017 | | 2017 |
| Study and Evaluation of several Cache Replacement Policies on a Commercial MIPS Processor DP Rivero Universidad Complutense de Madrid, 2016 | | 2016 |
| Tecnicas de simplificación de la política de reemplazamiento cache Probabilistic Escape LIFO E Sedano Algarabel | | 2010 |
| Simplificación y extensión a un entorno multi-core de la política de reemplazamiento Probabilistic Escape LIFO S Sepúlveda, E Sedano, D Chaver, F Castro, L Piñuel, F Tirado Congreso Español de Informática (CEDI), 217-224, 2010 | | 2010 |
| Hardware and Software Thermal-Aware Policies in Embedded Processors JL Ayala, PG Del Valle, E Sedano, M Sabry, D Atienza IWIA 2009, International Workshop on Innovative Architecture for Future …, 2009 | | 2009 |
| Implementación de una plataforma HW para la evaluación de predictores e saltos sobre arquitectura SPARC v8 FJ Andrade Irigoyen, A Castillo Villalba, E Sedano Algarabel | | 2008 |
Daniel ChaverAssociate Professor, Universidad Complutense de MadridVerified email at ucm.es
