| Analysis and design of a two stage cmos op-amp with 180nm using miller compensation technique S Goyal, N Sachdeva, T Sachdeva Int. Journal on Recent and Innovation Trends in Computing and Communication …, 2015 | 15 | 2015 |
| An FPGA based real-time histogram equalization circuit for image enhancement N Sachdeva, T Sachdeva International Journal of Electronics Communication Technology (IJECT) 1 (1), 2010 | 10 | 2010 |
| Effect of gate work-function on gate induced drain leakage of MOSFETs N Sachdeva, M Vashishath, PK Bansal IJCEM 21 (1), 11-16, 2018 | 7 | 2018 |
| "Design and Analysis of carry look ahead adder using CMOS technique" NS Amita IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) 9 (2 …, 2014 | 6* | 2014 |
| Effect of temperature fluctuations on MOSFET characteristics N Sachdeva, N Julka International Journal of Electronics & Communication Technology, I S SN …, 2011 | 6 | 2011 |
| Performance investigation of dual-halo dual-dielectric triple material surrounding gate MOSFET with high-K dielectrics for low power applications N Gupta, P Kumar, N Sachdeva, T Sachdeva, M Vashistha Journal of Semiconductor Technology and Science 20 (3), 1-8, 2020 | 5 | 2020 |
| Analytical Modeling & Simulation of OFF-State Leakage Current for Lightly Doped MOSFETs N Sachdeva, M Vashishath, PK Bansal Journal of Nano-and Electronic Physics 9 (6), 2017 | 5 | 2017 |
| Performance Investigation of Dual-Halo Dual-Dielectric Triple Material Surrounding Gate MOSFET with High-κ dielectrics for Low Power Applications P Kumar, N Gupta, N Sachdeva, T Sachdeva, M Vashishath JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 20 (3), 297-304, 2020 | 4 | 2020 |
| Effect of Various Parameters on Threshold Voltage of Virtually Fabricated Lightly Doped PMOS Device N Sachdeva, M Vashishath, PK Bansal Journal of VLSI Design Tools & Technology 7 (3), 13-20, 2017 | 2 | 2017 |
| Analysis of Sub-threshold Leakage Reduction Techniques for High-Speed Low Power VLSI Circuits N Sachdeva, N Gupta, TK Sachdeva 2023 14th International Conference on Computing Communication and Networking …, 2023 | | 2023 |
| Application of Silicide Layer and Work Function in Optimization of MOSFET Process Parameters RB Nitin Sachdeva, Neetu Gupta, Prashant Kumar European Chemical Bulletin (Special Issue 4) 12 (4), 10799 – 10808, 2023 | | 2023 |
| Branching Particle Filter for Crowd Anomaly Detection N Gupta, N Sachdeva, G Sardana, R Bansal | | 2023 |
| International Research Journal of Engineering and Technology YSN Sachdeva International Research Journal of Engineering and Technology (IRJET) 9 (7 …, 2022 | | 2022 |
| Modeling, estimation and reduction of total leakage in scaled CMOS logic circuits N Sachdeva JC Bose University, 2021 | | 2021 |
| Effect of variation of Gate work-function on Electrical characteristics of Lightly doped MOSFET NJ Nitin Sachdeva, Tarun Kumar Sachdeva International Journal of Future Generation Communication and Networking 12 …, 2019 | | 2019 |
| Analytical 2D Modeling of Surface Potential and Threshold voltage for Lightly doped substrate NMOS TKS Nitin Sachdeva International Journal of Recent Technology and Engineering (IJRTE) 8 (4 …, 2019 | | 2019 |
| Impact of various Doping Distributions on N-MOSFET Performance DPKB Nitin Sachdeva, Dr. Munish Vashishath International Journal of Technology 8 (1), 23-32, 2018 | | 2018 |
| The Impact of Substrate Doping Concentration on Electrical Characteristics of 45nm Nmos Device N Sachdeva, M Vashishath, PK Bansal i-Manager's Journal on Electronics Engineering 8 (2), 20, 2017 | | 2017 |
| Effect of Halo Implant and Threshold Implant on Sub-Threshold Current and Substrate Current of MOSFET N Sachdeva, M Vashishath, PK Bansal i-Manager's Journal on Embedded Systems 6 (1), 23, 2017 | | 2017 |
| Reduction of Short Channel Effects with the Variation of Poly Doping and Source/Drain Doping PKB Nitin Sachdeva,, Munish Vashishath Journal of Semi-conductor Devices and Circuits 4 (3), 35-42, 2017 | | 2017 |
