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Mateo Valero
Mateo Valero
Professor and director of the Barcelona Supercomputing Center
Adresă de e-mail confirmată pe bsc.es - Pagina de pornire
Titlu
Citat de
Citat de
Anul
The international exascale software project roadmap
J Dongarra, P Beckman, T Moore, P Aerts, G Aloisio, JC Andre, D Barkai, ...
The international journal of high performance computing applications 25 (1 …, 2011
9452011
A data cache with multiple caching strategies tuned to different types of locality
A González, C Aliagas, M Valero
ACM International Conference on Supercomputing 25th Anniversary Volume, 217-226, 1995
4231995
Multiple-banked register file architectures
JL Cruz, A González, M Valero, NP Topham
Proceedings of the 27th annual international symposium on Computer …, 2000
3862000
Hardware support for WCET analysis of hard real-time multicore systems
M Paolieri, E Quiñones, FJ Cazorla, G Bernat, M Valero
ACM SIGARCH Computer Architecture News 37 (3), 57-68, 2009
3472009
Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors
TY Morad, UC Weiser, A Kolodnyt, M Valero, E Ayguade
IEEE Computer Architecture Letters 5 (1), 14-17, 2006
2952006
Enabling preemptive multiprogramming on GPUs
I Tanasic, I Gelado, J Cabezas, A Ramirez, N Navarro, M Valero
ACM SIGARCH Computer Architecture News 42 (3), 193-204, 2014
2562014
Dynamically controlled resource allocation in SMT processors
FJ Cazorla, A Ramirez, M Valero, E Fernández
37th International Symposium on Microarchitecture (MICRO-37'04), 171-182, 2004
2422004
Alya: Multiphysics engineering simulation toward exascale
M Vázquez, G Houzeaux, S Koric, A Artigues, J Aguado-Sierra, R Arís, ...
Journal of computational science 14, 15-27, 2016
2252016
Fuzzy memoization for floating-point multimedia applications
C Alvarez, J Corbal, M Valero
IEEE Transactions on Computers 54 (7), 922-927, 2005
2152005
Improving cache management policies using dynamic reuse distances
N Duong, D Zhao, T Kim, R Cammarota, M Valero, AV Veidenbaum
2012 45Th annual IEEE/ACM international symposium on microarchitecture, 389-400, 2012
2122012
An analyzable memory controller for hard real-time CMPs
M Paolieri, E Quinones, FJ Cazorla, M Valero
IEEE Embedded Systems Letters 1 (4), 86-90, 2009
2102009
Supercomputing with commodity CPUs: Are mobile SoCs ready for HPC?
N Rajovic, PM Carpenter, I Gelado, N Puzovic, A Ramirez, M Valero
Proceedings of the International Conference on High Performance Computing …, 2013
2072013
Swing module scheduling: a lifetime-sensitive approach
J Llosa, A González, E Ayguadé, M Valero
Proceedings of the 1996 Conference on Parallel Architectures and compilation …, 1996
2041996
Discrete optimization problem in local networks and data alignment
Fiol, Yebra, Alegre, Valero
IEEE Transactions on Computers 100 (6), 702-713, 1987
2031987
Bandwidth of crossbar and multiple-bus connections for multiprocessors
Lang, Valero, Alegre
IEEE Transactions on Computers 100 (12), 1227-1234, 1982
1901982
Eliminating cache conflict misses through XOR-based placement functions
A González, M Valero, N Topham, JM Parcerisa
Proceedings of the 11th international conference on Supercomputing, 76-83, 1997
1821997
Virtual-physical registers
A Gonzalez, J Gonzalez, M Valero
Proceedings 1998 Fourth International Symposium on High-Performance Computer …, 1998
1761998
Out-of-order commit processors
A Cristal, D Ortega, J Llosa, M Valero
10th International Symposium on High Performance Computer Architecture (HPCA …, 2004
1682004
Task superscalar: An out-of-order task pipeline
Y Etsion, F Cabarcas, A Rico, A Ramirez, RM Badia, E Ayguade, ...
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 89-100, 2010
1652010
EazyHTM: Eager-lazy hardware transactional memory
S Tomić, C Perfumo, C Kulkarni, A Armejach, A Cristal, O Unsal, T Harris, ...
Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009
1572009
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