| The EPFL logic synthesis libraries M Soeken, H Riener, W Haaswijk, E Testa, B Schmitt, G Meuli, F Mozafari, ... arXiv preprint arXiv:1805.05121, 2022 | 106 | 2022 |
| A Versatile Mapping Approach for Technology Mapping and Graph Optimization AT Calvino, H Riener, S Rai, A Kumar, G De Micheli 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 410-416, 2022 | 17 | 2022 |
| SysML models verification relying on dependency graphs L Apvrille, P de Saqui-Sannes, O Hotescu, AT Calvino 10th International Conference on Model-Driven Engineering and Software …, 2022 | 11 | 2022 |
| Direct model-checking of SysML models AT Calvino, L Apvrille 9th International Conference on Model-Driven Engineering and Software …, 2021 | 11 | 2021 |
| Depth-optimal buffer and splitter insertion and optimization in AQFP circuits AT Calvino, G De Micheli Proceedings of the 28th Asia and South Pacific Design Automation Conference …, 2023 | 7 | 2023 |
| Majority-based design flow for AQFP superconducting family G Meuli, V Possani, R Singh, SY Lee, AT Calvino, DS Marakkalage, ... 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 34-39, 2022 | 6 | 2022 |
| Utilizing xmg-based synthesis to preserve self-duality for rfet-based circuits S Rai, AT Calvino, H Riener, G De Micheli, A Kumar IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 5 | 2022 |
| Synthesis of SFQ Circuits with Compound Gates R Bairamkulov, A Tempia Calvino, G De Micheli 2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration …, 2023 | 3 | 2023 |
| From logic to gates: A versatile mapping approach to restructure logic AT Calvino, H Riener, S Rai, GD Micheli Proceedings of the 30th International Workshop on Logic & Synthesis (IWLS 2021), 2021 | 3 | 2021 |
| Technology Mapping Using Multi-output Library Cells AT Calvino, G De Micheli International Conference on Computer-Aided Design (ICCAD), 2023 | 2 | 2023 |
| Improving Standard-Cell Design Flow using Factored Form Optimization AT Calvino, A Mishchenko, H Schmit, E Mahintorabi, G De Micheli, X Xu 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 2 | 2023 |
| Algebraic and Boolean Methods for SFQ Superconducting Circuits AT Calvino, G De Micheli 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 588-593, 2024 | 1 | 2024 |
| Technology-Aware Logic Synthesis for Superconducting Electronics R Bairamkulov, SY Lee, A Tempia Calvino, DS Marakkalage, M Yu, ... 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2024 | | 2024 |
| Scalable Logic Rewriting Using Don’t Cares A Tempia Calvino, G De Micheli Design, Automation and Test in Europe, 2024 | | 2024 |
| In Medio Stat Virtus*: Combining Boolean and Pattern Matching G Radi, A Tempia Calvino, G De Micheli 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 404-410, 2024 | | 2024 |
| Boolean Decomposition Revisited M Alan, B Robert, A Tempia Calvino, G De Micheli International Logic Synthesis Workshop (IWLS), 2023 | | 2023 |
| Dependency Graphs to Boost the Verification of SysML Models L Apvrille, P Saqui-Sannes, OA Hotescu, A Tempia Calvino Springer, 2023 | | 2023 |
| Depth-optimal Buffer and Splitter Insertion and Optimization in AQFP Circuits A Tempia Calvino, G De Micheli IWLS 2022, 2022 | | 2022 |
| Implementation of Algorithms for Synthesis of Digital Circuits A Tempia Calvino Politecnico di Torino, 2020 | | 2020 |
| LSI1 A Nakhjavani, N Sattar Aliakbari, LG Amarù, F Angiolini, JL Ayala Rodrigo, ... | | |
Giovanni De MicheliEPFL, StanfordAdresă de e-mail confirmată pe epfl.ch
