| Design and experimental evaluation of a time-interleaved ADC calibration algorithm for application in high-speed communication systems BT Reyes, RM Sanchez, AL Pola, MR Hueda IEEE Transactions on Circuits and Systems I: Regular Papers 64 (5), 1019-1030, 2016 | 41 | 2016 |
| 8.6 A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET RL Nguyen, AM Castrillon, A Fan, A Mellati, BT Reyes, C Abidin, E Olsen, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 136-138, 2021 | 39 | 2021 |
| Efficient estimation and correction of mismatch errors in time-interleaved ADCs CA Schmidt, JE Cousseau, JL Figueroa, BT Reyes, MR Hueda IEEE Transactions on Instrumentation and Measurement 65 (2), 243-254, 2015 | 37 | 2015 |
| An energy-efficient hierarchical architecture for time-interleaved SAR ADC BT Reyes, L Biolato, AC Galetto, L Passetti, F Solis, MR Hueda IEEE Transactions on Circuits and Systems I: Regular Papers 66 (6), 2064-2076, 2019 | 26 | 2019 |
| Joint sampling-time error and channel skew calibration of time-interleaved ADC in multichannel fiber optic receivers BT Reyes, V Gopinathan, PS Mandolesi, MR Hueda 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 2981-2984, 2012 | 17 | 2012 |
| A 6-bit 2GS/s CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques BT Reyes, L Tealdi, G Paulina, E Labat, R Sanchez, PS Mandolesi, ... 2014 IEEE 5th Latin American Symposium on Circuits and Systems, 1-4, 2014 | 13 | 2014 |
| Background calibration of time-interleaved ADC for optical coherent receivers using error backpropagation techniques F Solis, AF Bocco, D Morero, MR Hueda, BT Reyes 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 12 | 2020 |
| Backpropagation-based background compensation of frequency interleaved ADC for coherent optical receivers L Passetti, AC Galetto, DJ Hernando, D Morero, BT Reyes, MR Hueda 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 11 | 2020 |
| A 1.6 Gb/s CMOS LVDS transmitter with a programmable pre-emphasis system BT Reyes, G Paulina, L Tealdi, E Labat, R Sanchez, PS Mandolesi, ... 2014 IEEE 5th Latin American Symposium on Circuits and Systems, 1-4, 2014 | 9 | 2014 |
| A 4GS/s 8‐bit time‐interleaved SAR ADC with an energy‐efficient architecture in 130 nm CMOS F Solis, A Fernandez Bocco, AC Galetto, L Passetti, MR Hueda, BT Reyes International Journal of Circuit Theory and Applications 49 (10), 3171-3185, 2021 | 7 | 2021 |
| A 2GS/s 6-bit CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques BT Reyes, G Paulina, R Sanchez, PS Mandolesi, MR Hueda Analog Integrated Circuits and Signal Processing 85 (1), 3-16, 2015 | 7 | 2015 |
| On the application of error backpropagation to the background calibration of time interleaved ADC for digital communication receivers F Solis, BT Reyes, DA Morero, MR Hueda arXiv preprint arXiv:2008.02914, 2020 | 6 | 2020 |
| Adaptive background compensation of frequency interleaved DACs with application to coherent optical transceivers AC Galetto, BT Reyes, DA Morero, MR Hueda IEEE Access 9, 41821-41832, 2021 | 5 | 2021 |
| A 4GS/s 8-bit SAR ADC with an Energy-Efficient Time-Interleaved Architecture in 130nm CMOS BT Reyes, L Biolato, AC Galetto, L Passetti, F Solis, JI Giubilatto, ... 2020 Argentine Conference on Electronics (CAE), 77-81, 2020 | 5 | 2020 |
| Error-backpropagation-based background calibration of TI-ADC for adaptively equalized digital communication receivers F Solis, BT Reyes, DA Morero, MR Hueda IEEE Access 10, 103013-103027, 2022 | 4 | 2022 |
| Background Compensation of Static TI-ADC Nonlinearities in Coherent Optical Receivers ÁF Bocco, F Solis, BT Reyes, DA Morero, MR Hueda 2021 Argentine Conference on Electronics (CAE), 45-49, 2021 | 4 | 2021 |
| Background compensation of frequency interleaved DAC for optical transceivers AC Galetto, BT Reyes, DA Morero, MR Hueda 2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 1-4, 2021 | 4 | 2021 |
| Backpropagation Based Background Compensation of TI-DAC Errors in High-Speed Transmitters AC Galetto, BT Reyes, DA Morero, MR Hueda 2022 IEEE 65th International Midwest Symposium on Circuits and Systems …, 2022 | 3 | 2022 |
| Design and experimental verification of a novel error-backpropagation-based background calibration for time interleaved ADC in digital communication receivers F Solis, BT Reyes, DA Morero, MR Hueda arXiv preprint arXiv:2204.04806, 2022 | 3 | 2022 |
| An Error Backpropagation-based Background Calibration of Pipeline TI-ADCs for 256-QAM Optical Coherent Receivers ÁF Bocco, F Solis, BT Reyes, DA Morero, MR Hueda 2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 1-4, 2021 | 3 | 2021 |
