| Elliptic curve cryptography engineering A Cilardo, L Coppolino, N Mazzocca, L Romano Proceedings of the IEEE 94 (2), 395-406, 2006 | 104 | 2006 |
| High speed speculative multipliers based on speculative carry-save tree A Cilardo, D De Caro, N Petra, F Caserta, N Mazzocca, E Napoli, ... IEEE Transactions on Circuits and Systems I: Regular Papers 61 (12), 3426-3435, 2014 | 63 | 2014 |
| A new speculative addition architecture suitable for two's complement operations A Cilardo 2009 Design, Automation & Test in Europe Conference & Exhibition, 664-669, 2009 | 63 | 2009 |
| Improving multibank memory access parallelism with lattice-based partitioning A Cilardo, L Gallo ACM Transactions on Architecture and Code Optimization (TACO) 11 (4), 1-25, 2015 | 62 | 2015 |
| Carry-save Montgomery modular exponentiation on reconfigurable hardware A Cilardo, A Mazzeo, L Romano, GP Saggese Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 52 | 2004 |
| Fast Parallel GF (2^ m) Polynomial Multiplication for All Degrees A Cilardo IEEE Transactions on Computers 62 (5), 929-943, 2012 | 51 | 2012 |
| Design automation for application-specific on-chip interconnects: A survey A Cilardo, E Fusella Integration 52, 102-121, 2016 | 43 | 2016 |
| Interplay of loop unrolling and multidimensional memory partitioning in HLS A Cilardo, L Gallo 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 163-168, 2015 | 43 | 2015 |
| Adaptable parsing of real-time data streams F Campanile, A Cilardo, L Coppolino, L Romano 15th EUROMICRO International Conference on Parallel, Distributed and Network …, 2007 | 43 | 2007 |
| Design space exploration for high-level synthesis of multi-threaded applications A Cilardo, L Gallo, N Mazzocca Journal of Systems Architecture 59 (10), 1171-1183, 2013 | 41 | 2013 |
| Exploiting vulnerabilities in cryptographic hash functions based on reconfigurable hardware A Cilardo, N Mazzocca IEEE Transactions on Information Forensics and Security 8 (5), 810-820, 2013 | 37 | 2013 |
| Exploring the design-space for FPGA-based implementation of RSA A Cilardo, A Mazzeo, L Romano, GP Saggese Microprocessors and Microsystems 28 (4), 183-191, 2004 | 37 | 2004 |
| Efficient and scalable OpenMP-based system-level design A Cilardo, L Gallo, A Mazzeo, N Mazzocca 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 988-991, 2013 | 36 | 2013 |
| Exploring the potential of threshold logic for cryptography-related operations A Cilardo IEEE Transactions on Computers 60 (4), 452-462, 2010 | 34 | 2010 |
| Efficient Bit-Parallel GF (2^ m) Multiplier for a Large Class of Irreducible Pentanomials A Cilardo IEEE Transactions on Computers 58 (7), 1001-1008, 2009 | 34 | 2009 |
| PhoNoCMap: An application mapping tool for photonic networks-on-chip E Fusella, A Cilardo 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 289-292, 2016 | 32 | 2016 |
| New techniques and tools for application-dependent testing of FPGA-based components A Cilardo IEEE Transactions on Industrial Informatics 11 (1), 94-103, 2014 | 32 | 2014 |
| Secure distribution infrastructure for hardware digital contents A Cilardo, M Barbareschi, A Mazzeo IET Computers & Digital Techniques 8 (6), 300-310, 2014 | 32 | 2014 |
| Designing a SHA-256 processor for blockchain-based IoT applications R Martino, A Cilardo Internet of Things 11, 100254, 2020 | 29 | 2020 |
| Minimizing power loss in optical networks-on-chip through application-specific mapping E Fusella, A Cilardo Microprocessors and Microsystems 43, 4-13, 2016 | 29 | 2016 |
