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Vito Giovanni Castellana
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Cited by
Year
Big data: Algorithms, analytics, and applications
KC Li, H Jiang, LT Yang, A Cuzzocrea
CRC Press, 2015
962015
In-memory graph databases for web-scale data
VG Castellana, A Morari, J Weaver, A Tumeo, D Haglin, O Villa, J Feo
Computer 48 (3), 24-35, 2015
272015
A runtime adaptive controller for supporting hardware components with variable latency
C Pilato, VG Castellana, S Lovergine, F Ferrandi
2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 153-160, 2011
272011
Big data management and processing
KC Li, H Jiang, AY Zomaya
CRC Press, 2017
242017
Bambu: an open-source research framework for the high-level synthesis of complex applications
F Ferrandi, VG Castellana, S Curzel, P Fezzardi, M Fiorito, M Lattuada, ...
2021 58th ACM/IEEE Design Automation Conference (DAC), 1327-1330, 2021
212021
Scaling semantic graph databases in size and performance
A Morari, VG Castellana, O Villa, A Tumeo, J Weaver, D Haglin, ...
IEEE Micro 34 (4), 16-26, 2014
182014
High level synthesis of RDF queries for graph analytics
VG Castellana, M Minutoli, A Morari, A Tumeo, M Lattuada, F Ferrandi
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 323-330, 2015
162015
Graql: A query language for high-performance attributed graph databases
D Chavarría-Miranda, VG Castellana, A Morari, D Haglin, J Feo
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016
142016
A visual analytics paradigm enabling trillion-edge graph exploration
PC Wong, D Haglin, D Gillen, D Chavarria, V Castellana, C Joslyn, ...
2015 IEEE 5th Symposium on Large Data Analysis and Visualization (LDAV), 57-64, 2015
132015
Inter-procedural resource sharing in high level synthesis through function proxies
M Minutoli, VG Castellana, A Tumeo, F Ferrandi
2015 25th International Conference on Field Programmable Logic and …, 2015
132015
An adaptive memory interface controller for improving bandwidth utilization of hybrid and reconfigurable systems
VG Castellana, A Tumeo, F Ferrandi
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-4, 2014
132014
An automated flow for the high level synthesis of coarse grained parallel applications
VG Castellana, F Ferrandi
2013 International Conference on Field-Programmable Technology (FPT), 294-301, 2013
132013
Soda: a new synthesis infrastructure for agile hardware design of machine learning accelerators
M Minutoli, VG Castellana, C Tan, J Manzano, V Amatya, A Tumeo, ...
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-7, 2020
122020
Svelto: High-level synthesis of multi-threaded accelerators for graph analytics
M Minutoli, VG Castellana, N Saporetti, S Devecchi, M Lattuada, ...
IEEE Transactions on Computers 71 (3), 520-533, 2021
102021
Efficient synthesis of graph methods: A dynamically scheduled architecture
M Minutoli, VG Castellana, A Tumeo, M Lattuada, F Ferrandi
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
102016
Big data analytics
V Govindaraju, V Raghavan, CR Rao
Elsevier, 2015
102015
Scheduling independent liveness analysis for register binding in high level synthesis
VG Castellana, F Ferrandi
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
102013
Automated generation of integrated digital and spiking neuromorphic machine learning accelerators
S Curzel, NB Agostini, S Song, I Dagli, A Limaye, C Tan, M Minutoli, ...
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-7, 2021
92021
Shad: The scalable high-performance algorithms and data-structures library
VG Castellana, M Minutoli
2018 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid …, 2018
92018
High-level synthesis of memory bound and irregular parallel applications with bambu
VG Castellana, A Tumeo, F Ferrandi
26th IEEE Hot Chips Symposium, HCS 2014, 1-1, 2014
82014
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