Ren Chen
Ren Chen
Ph.D of Electrical and Computer Engineering, University of Southern California
Adresă de e-mail confirmată pe usc.edu - Pagina de pornire
Citat de
Citat de
Decoupling the depth and scope of graph neural networks
H Zeng, M Zhang, Y Xia, A Srivastava, A Malevich, R Kannan, V Prasanna, ...
Advances in Neural Information Processing Systems 34, 19665-19679, 2021
A framework for generating high throughput CNN implementations on FPGAs
H Zeng, R Chen, C Zhang, V Prasanna
Proceedings of the 2018 ACM/SIGDA international symposium on field …, 2018
Energy and memory efficient mapping of bitonic sorting on FPGA
R Chen, S Siriyal, V Prasanna
Proceedings of the 2015 ACM/SIGDA International Symposium on Field …, 2015
Accelerating equi-join on a CPU-FPGA heterogeneous platform
R Chen, VK Prasanna
2016 IEEE 24th Annual International Symposium on Field-Programmable Custom …, 2016
A hybrid design for high performance large-scale sorting on FPGA
A Srivastava, R Chen, V Prasanna, Chelmis
2015 International Conference on ReConFigurable Computing and FPGAs …, 2015
High throughput large scale sorting on a CPU-FPGA heterogeneous platform
C Zhang, R Chen, V Prasanna
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016
Computer generation of high throughput and memory efficient sorting designs on FPGA
R Chen, VK Prasanna
IEEE Transactions on Parallel and Distributed Systems 28 (11), 3100-3113, 2017
Deep graph neural networks with shallow subgraph samplers
H Zeng, M Zhang, Y Xia, A Srivastava, R Kannan, V Prasanna, L Jin, ...
High throughput energy efficient parallel FFT architecture on FPGAs
R Chen, N Park, VK Prasanna
2013 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2013
Energy efficient parameterized FFT architecture
R Chen, H Le, VK Prasanna
2013 23rd International Conference on Field programmable Logic and …, 2013
Automatic generation of high throughput energy efficient streaming architectures for arbitrary fixed permutations
R Chen, VK Prasanna
2015 25th International Conference on Field Programmable Logic and …, 2015
Energy-efficient architecture for stride permutation on streaming data
R Chen, VK Prasanna
2013 International Conference on Reconfigurable Computing and FPGAs …, 2013
Energy optimizations for FPGA-based 2-D FFT architecture
R Chen, VK Prasanna
2014 IEEE high performance extreme computing conference (HPEC), 1-6, 2014
Energy performance of fpgas on perfect suite kernels
SR Kuppannagari, R Chen, A Sanny, SG Singapura, GPC Tran, S Zhou, ...
2014 IEEE High Performance Extreme Computing Conference (HPEC), 1-6, 2014
System for handling concurrent property graph queries
Y Xia, L Zhou, R Chen
US Patent 11,120,023, 2021
C-graph: A highly efficient concurrent graph reachability query framework
L Zhou, R Chen, Y Xia, R Teodorescu
Proceedings of the 47th International Conference on Parallel Processing, 1-10, 2018
Optimizing frequency domain implementation of CNNs on FPGAs
H Zeng, R Chen, VK Prasanna
University of Southern California, Tech. Rep, 2017
Optimal Dynamic Data Layouts for 2D FFT on 3D Memory Integrated FPGA (Journal Version)
R Chen, SG Singapura, VK Prasanna
The Journal of Supercomputing 72 (Issues 240), pp 1–12, 2016
DRAM row activation energy optimization for stride memory access on FPGA-based systems
R Chen, VK Prasanna
International Symposium on Applied Reconfigurable Computing, 349-356, 2015
Finding top k shortest simple paths with improved space efficiency
Q Wen, R Chen, L Nai, L Zhou, Y Xia
Proceedings of the Fifth International Workshop on Graph Data-management …, 2017
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