Urmăriți
Alexander Marquardt
Alexander Marquardt
Elastic
Adresă de e-mail confirmată pe utoronto.ca - Pagina de pornire
Titlu
Citat de
Citat de
Anul
Architecture and CAD for deep-submicron FPGAs
V Betz, J Rose, A Marquardt
Springer Science & Business Media, 2012
18082012
Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
A Marquardt, V Betz, J Rose
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999
3661999
Timing-driven placement for FPGAs
A Marquardt, V Betz, J Rose
Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000
3632000
The Stratix II Logic and Routing Architecture
D Lewis, E Ahmed, G Baeckler, V Betz, M Bourgeault, D Cashman, ...
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005
2642005
The Stratix Routing and Logic Architecture
D Lewis, V Betz, D Jefferson, A Lee, C Lane, P Leventis, S Marquardt, ...
Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003
1712003
The Stratix-II Routing and Logic Architecture
D Lewis, V Betz, D Jefferson, A Lee, C Lane, P Leventis, S Marquardt, ...
Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field …, 2005
1422005
Speed and area tradeoffs in cluster-based FPGA architectures
A Marquardt, V Betz, J Rose
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 84-93, 2000
1322000
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 7,218,133, 2007
472007
Architecture and CAD for deep-submicron FPGAs. Vol. 497
V Betz, J Rose, A Marquardt
Springer Science & Business Media, 2012
402012
Routing architecture for a programmable logic device
DM Lewis, P Leventis, AL Lee, BD Johnson, R Cliff, ST Reddy, CF Lane, ...
US Patent 6,630,842, 2003
272003
Versatile logic element and logic array block
DM Lewis, P Leventis, AL Lee, H Kim, B Pedersen, C Wysocki, CF Lane, ...
US Patent 6,937,064, 2005
222005
Cluster-based architecture, timing-driven packing and timing-driven placement for FPGAs.
AR Marquardt
University of Toronto, 2001
212001
Routing tools and routing architecture generation
V Betz, J Rose, A Marquardt, V Betz, J Rose, A Marquardt
Architecture and CAD For Deep-Submicron FPGAS, 63-103, 1999
111999
Background and Previous Work
V Betz, J Rose, A Marquardt, V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 11-35, 1999
101999
Global Routing Architecture
V Betz, J Rose, A Marquardt, V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 105-126, 1999
91999
Detailed Routing Architecture
V Betz, J Rose, A Marquardt, V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 151-190, 1999
91999
Architecture and CAD for Deep-Submicron FPGAs. 1999
V Betz, J Rose, A Marquardt
Kluwer Academic Publishers, 0
9
Cluster-Based Logic Blocks
V Betz, J Rose, A Marquardt, V Betz, J Rose, A Marquardt
Architecture and CAD for Deep-Submicron FPGAS, 127-149, 1999
21999
Method and system for estimating the reliability of blacklists of botnet-infected computers
DO García, JL Garcia, AF Segador, A Marquardt, MV Vilasero
US Patent 8,516,595, 2013
12013
CAD Tools: Packing and Placement
V Betz, J Rose, A Marquardt, V Betz, J Rose, A Marquardt
Architecture and CAD for deep-submicron FPGAs, 37-61, 1999
11999
Sistemul nu poate realiza operația în acest moment. Încercați din nou mai târziu.
Articole 1–20