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Jörg Pfähler
Jörg Pfähler
Universität Augsburg
Verified email at isse.de - Homepage
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Cited by
Year
KIV: overview and VerifyThis competition
G Ernst, J Pfähler, G Schellhorn, D Haneberg, W Reif
International Journal on Software Tools for Technology Transfer 17, 677-694, 2015
652015
Development of a verified flash file system
G Schellhorn, G Ernst, J Pfähler, D Haneberg, W Reif
Abstract State Machines, Alloy, B, TLA, VDM, and Z: 4th International …, 2014
432014
Verification of a virtual filesystem switch
G Ernst, G Schellhorn, D Haneberg, J Pfähler, W Reif
Verified Software: Theories, Tools, Experiments: 5th International …, 2014
392014
RGITL: A temporal logic framework for compositional reasoning about interleaved programs
G Schellhorn, B Tofan, G Ernst, J Pfähler, W Reif
Annals of Mathematics and Artificial Intelligence 71, 131-174, 2014
352014
Inside a verified flash file system: transactions and garbage collection
G Ernst, J Pfähler, G Schellhorn, W Reif
Verified Software: Theories, Tools, and Experiments: 7th International …, 2016
292016
Modular, crash-safe refinement for ASMs with submachines
G Ernst, J Pfähler, G Schellhorn, W Reif
Science of Computer Programming 131, 3-21, 2016
242016
Formal specification of an erase block management layer for flash memory
J Pfähler, G Ernst, G Schellhorn, D Haneberg, W Reif
Hardware and Software: Verification and Testing: 9th International Haifa …, 2013
202013
A formal model of a virtual filesystem switch
G Ernst, G Schellhorn, D Haneberg, J Pfähler, W Reif
arXiv preprint arXiv:1211.6187, 2012
192012
Modular verification of order-preserving write-back caches
J Pfähler, G Ernst, S Bodenmüller, G Schellhorn, W Reif
International Conference on Integrated Formal Methods, 375-390, 2017
122017
Crash-safe refinement for a verified flash file system
J Pfähler, G Ernst, G Schellhorn, D Haneberg, W Reif
122014
Modular refinement for submachines of asms
G Ernst, J Pfähler, G Schellhorn, W Reif
Abstract State Machines, Alloy, B, TLA, VDM, and Z: 4th International …, 2014
92014
Adding concurrency to a sequential refinement tower
G Schellhorn, S Bodenmüller, J Pfähler, W Reif
International Conference on Rigorous State-Based Methods, 6-23, 2020
72020
A modular verification methodology for caching and lock-based concurrency in file systems
J Pfähler
52018
Symbolic execution for a clash-free subset of ASMs
G Schellhorn, G Ernst, J Pfähler, S Bodenmüller, W Reif
Science of Computer Programming 158, 21-40, 2018
42018
Compositional verification of a lock-free stack with RGITL
B Tofan, G Schellhorn, G Ernst, J Pfahler, W Reif
Electronic Communications of the EASST 66, 2014
42014
A relational encoding for a clash-free subset of ASMs
G Schellhorn, G Ernst, J Pfähler, W Reif
Abstract State Machines, Alloy, B, TLA, VDM, and Z: 5th International …, 2016
32016
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